The present invention relates, in general, to the field of ferroelectric random access memory (F-RAM) integrated circuit devices and devices incorporating FRAM memory arrays. More particularly, the present invention relates to an F-RAM authenticating memory device and method providing secure mutual authentication between a Host system and a memory in order to gain read/write access to the F-RAM user memory contents.
Various types of memory technologies are currently available including dynamic random access memory (DRAM) devices which are implemented utilizing a volatile, dynamic memory cell architecture, typically with each cell comprising a single transistor and capacitor. They are “volatile” in the sense that upon power down, the memory contents are lost and “dynamic” in the sense that they must be constantly refreshed to maintain the charge ln the cell capacitor.
On the other hand, static random access memory (SRAM) devices are designed utilizing a volatile static memory cell architecture. They are considered to be “static” in that the contents of the memory cells need not be refreshed and the memory contents may be maintained indefinitely as long as power is supplied to the device. The individual memory cells of an SRAM generally comprise a simple, bi-stable transistor-based latch, using four, six or more transistors, that is either set or reset depending on the state of the data that was written to it. SRAM provides much faster read and write access time than DRAM.
In addition to DRAM and SRAM memories, various types of non-volatile memory devices are also currently available, by means of which data can be retained without continuously applied power. These include, for example, floating gate devices such as erasable programmable read only memory (“EPROM”) devices, including electrically erasable (“EEPROM”) devices, and Flash memory. While providing non-volatile data storage, their relatively slow access times (and in particular their very slow “write” times) present a significant disadvantage to their use in certain applications. In contrast, ferroelectric random access memory (F-RAM) devices such as those available from Ramtron International Corporation, assignee of the present invention, provide non-volatile data storage through the use of a ferroelectric dielectric material which may be polarized in one direction or another in order to store a binary value. The ferroelectric effect allows for the retention of a stable polarization in the absence of an applied electric field due to the alignment of internal dipoles within the Perovskite crystals in the dielectric material. In operation, F-RAM devices exhibit generally symmetric read/write times and faster write times than that of EPROM, EEPROM or Flash memory.
With respect to authenticating memory devices, the relatively slower write time of floating gate nonvolatile memories may result in less secure critical security parameter (CSP) updates since there is significantly more time to interfere with a CSP update when it is committed to non-volatile memory. Due to its faster write times, using F-RAM significantly reduces the time available to interfere with a CSP update.
Further, floating gate non-volatile memories exhibit a very distinctive write vs. read current profile that can be used in side channel attacks in an attempt to compromise CSPs. In comparison F-RAM's read vs. write current signature is balanced. Moreover, the erasure cycle of floating gate memory technologies is inherently slow when compared to that of F-RAM devices.